A plasma processing apparatus and a plasma processing method have been widely used for processing a substrate, e.g., a semiconductor wafer, by using a plasma. For example, an etching apparatus is commonly used in a semiconductor device manufacturing process as a technique for forming fine electric circuits on the semiconductor wafer by etching and removing a thin film formed on a semiconductor wafer by using a plasma.
Such an etching apparatus includes a processing chamber (an etching chamber) whose inner space can be air-tightly sealed such that a plasma is generated in the etching chamber. A semiconductor wafer is mounted on a susceptor installed in the etching chamber and then etched.
Among many known various types of apparatuses for generating the plasma, there is an apparatus which generates a plasma by supplying a high frequency power to a pair of upper and lower parallel plate electrodes facing each other, wherein one of the parallel electrodes, e.g., the lower electrode, serves as a susceptor. A semiconductor wafer is mounted on the lower electrode and a high frequency voltage is applied between the parallel plate electrodes to generate a plasma so that an etching process can be performed.
Further, such etching apparatus may have a focus ring formed of a ring shape and disposed to surround the periphery of the semiconductor wafer, wherein the focus ring serves to concentrate (focus) a plasma on a surface of a semiconductor wafer surface.
FIG. 19 schematically illustrates a cross-sectional view of principal parts of an etching apparatus having the focus ring as described above. As shown in FIG. 19, an electrostatic chuck 151 is installed on a top surface of a lower electrode 150 serving as a susceptor. The electrostatic chuck 151 has a dielectric layer 151a made of resin, ceramic, or the like and a flat plate electrode of electrostatic chuck 151b embedded in the dielectric layer 151a. 
A semiconductor wafer W is adsorptively supported on the electrode chuck 151 and the focus ring 152 is installed to surround the semiconductor wafer W that has been adsorptively supported on the electrode chuck 151. Reference numeral 153 indicates an insulating member.
However, in the above conventional etching apparatuses, a plasma induces a considerable electric potential difference between electric potentials of the semiconductor wafer W and the focus ring 152 during an etching process, and the electric potential difference leads to a so-called surface arcing that causes an abnormal discharge between a surface of the semiconductor wafer W and the focus ring 152.
For example, in case an insulating layer is formed on a conductive layer and then etched, for example, an insulating film formed of a silicon oxide film is etched to form a contact hole communicating with an underlying conductive layer made of a metal, the surface arcing frequently occurs between the underlying metal layer and the focus ring by destroying the silicon oxide film whose thickness is decreased by the etching.
If the abnormal discharge occurs, large portions of the silicon oxide film of the semiconductor wafer are destroyed and most devices of the semiconductor wafer become defective. Further, the inside of the etching chamber is contaminated with metal contaminants, which in turn makes it impossible to continue the etching process without cleaning the etching chamber, thereby significantly deteriorating overall productivity.
In order to measure the aforementioned electric potential difference between the semiconductor wafer and the focus ring, there was provided a semiconductor wafer having at a surface thereof an underlying layer (an insulating layer), a metal layer formed on the underlying layer, and a silicon oxide film layer that is an insulating layer formed on the metal layer. And by using as an etching gas a gaseous mixture of C4F8 (flow rate of 10 sccm), CO (flow rate of 50 sccm), Ar (flow rate of 200 sccm), and O2 (flow rate of 5 sccm), the silicon oxide film was etched to form a contact hole under a condition of a pressure of 5.99 Pa (45 mTorr) and a high frequency power of 1500 W. The resultant electric potential difference measured between the semiconductor wafer and the focus ring in the etching process was about 30-40 V.
The arcing may hardly occur under such an electric potential difference. However, the arcing may be caused by some other factors, e.g., in a case where a semiconductor wafer is eccentrically placed with respect to a lower electrode and, thus, a gap between a peripheral portion of the semiconductor wafer and the focus ring becomes locally narrower and/or in a case where a plasma is ununiformly generated by any cause. As described above, once the arcing occurs, the etching chamber needs to be cleaned. Therefore, the arcing should be completely prevented.
While a plasma processing apparatus performs an etching process on a semiconductor wafer or the like by using a plasma, the temperature of the semiconductor wafer or the like can be undesirably increased. Accordingly, many of the plasma processing apparatus have a temperature control mechanism for cooling the semiconductor wafer being etched.
FIG. 20 depicts an enlarged view of principal parts of a parallel plate etching apparatus equipped with such a temperature control mechanism. As illustrated in FIG. 20, a semiconductor wafer W is mounted on a lower electrode (a susceptor) 200 and then etched by a plasma generated by applying a high frequency power between an upper electrode (not shown) and the lower electrode.
Installed on the lower electrode 200 is an electrostatic chuck 8 for adsorptively supporting the semiconductor wafer W. The semiconductor wafer W is attracted thereon by the Coulomb force or the Johnson-Rahbeck force being generated by applying a high DC voltage to an electrode of electrostatic chuck 8b. 
A coolant path 210 for circulating a coolant is formed inside the lower electrode 200 so that the lower electrode 200 can be cooled down to a predetermined temperature. Further, a gas channel 220 for supplying a cooling gas such as a He gas is formed at the lower electrode 200. The gas channel 220 supplies a cooling gas, e.g., a He gas, between a backside of the semiconductor wafer W and the lower electrode 200 (the electrostatic chuck 8) in order to carry out an efficient heat exchange with the semiconductor wafer W and efficiently and precisely control the temperature of the semiconductor wafer W.
Furthermore, the gas channel 220 has a dual system of a peripheral portion gas channel 220a and a central portion gas channel 220b so that it is possible to change pressures of the cooling gases provided from the peripheral portion and the central portion of the semiconductor wafer W, respectively.
The lower electrode 200 is formed in an approximately circular plate in general and made of a metal such as aluminum having an anodic oxidized (alumite-treated) surface. Further, in order to install the coolant path 210 and the gas channel 220 inside the lower electrode 200, the lower electrode 200 is embodied by jointing three members, i.e., an upper plate 201, an intermediate plate 202 and a lower plate 203 (each being an approximately circular plate). And the coolant path 210 is formed by blocking an opening of each groove formed in a bottom surface of the intermediate plate 202 by the lower plate 203.
Meanwhile, the gas channel 220 has a gas storage 221 formed inside the lower electrode 200; a gas inlet circular hole 222 for introducing a gas from a bottom portion of the mounting table 200 to the gas storage 221; and a plurality of gas supply fine holes 223 for supplying the gas from the gas storage 221 to a backside of the semiconductor wafer W. The gas storage 221 is formed by blocking an opening of a groove formed in a bottom surface of the upper plate 201 by the intermediate plate 202.
In the above-described etching apparatus, a temperature of the lower electrode is controlled by circulating a coolant within the coolant path 210. Further, a temperature of the semiconductor wafer W can be efficiently and accurately controlled by a cooling gas being collected in the gas storage 221 through the gas inlet circular hole 222 and then supplied from the gas storage 221 to the backside of the semiconductor wafer W through the plurality of gas supply fine holes 223.
However, the inventors have found that, in the etching apparatus illustrated in FIG. 20, there occurs an abnormal discharge between the backside of the semiconductor wafer W and a bottom portion of the gas storage 221 via the gas supply fine holes 223.
A discharge at the backside of the semiconductor wafer W may inflict damages on each member and, at the same time, lead to an occurrence of the arcing on a surface of the semiconductor wafer W. In other words, the discharge at the backside of the semiconductor wafer W may cause a dielectric breakdown of an interlayer insulating film inside the semiconductor wafer W and a lighting-like discharge (surface arcing) from a plasma and the like may occur on the portion of the dielectric breakdown.